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01.08.2016

openHPI Course "Internetworking 2016"

A new openHPI course about "Internetworking" starts on September 5, 2016. The course is held by Prof. Dr. Christoph Meinel ... [more]
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openHPI Workshop "Embedded Smart Home"

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10.03.2016

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Lecture-Feed of Series: Representations and Methodology of Future Computing Technologies Feed of Series: Representations and Methodology of Future Computing Technologies

Representations and Methodology of Future Computing Technologies

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Molecular scale computing, Nanotechnology, as well as Quantum computing are trends in future computing that might offer the way to circumvent the approaching bottom of Moore's law for traditional silicon based technologies. For synthesis and design new types of representations are required to exploit the full potential of these new technologies. In the past, e.g. AND-EXOR based representations have proven to be simpler than standard AND-OR representations for switching functions, while on the other hand showing many different properties. Decision diagrams have been extensively studied and have provided powerful new techniques for verification and synthesis.

The goal of the symposium is to bring together researchers in these and related fields to discuss new approaches and results. This year the symposium took place in Trier, Germany. Previous workshops have been held in Starkville, Mississippi (USA) in 2001, in Victoria, BC (Canada) in 1999, in Oxford(UK) in 1997, in Tokyo (Japan) in 1995, and in Hamburg(Germany) in 1993.

Session 1

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Date: 10.03.2003
Lang.: en
Dur.: 00:28:14

ON SNF Optimization: A functional Comparison of Methods

Bernd Steinbach

ON SNF Optimization: A functional Comparison of Methods

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Date: 10.03.2003
Lang.: en
Dur.: 00:16:47

Towards a General Novel Exact ESOP Minimization Methodology

Stergios Stergiou

Towards a General Novel Exact ESOP Minimization Methodology

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Date: 10.03.2003
Lang.: en
Dur.: 00:27:16

An Algorithm for Optimal Presentation of a Partial Boolean Function as a MOD2 sum of products

G.R. Pogosyan

An Algorithm for Optimal Presentation of a Partial Boolean Function as a MOD2 sum of products

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Session 2

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Date: 10.03.2003
Lang.: en
Dur.: 00:25:13

Group-theoretic Approach to the Optimization Problems in Logic Design

R. S. Stankovic

Group-theoretic Approach to the Optimization Problems in Logic Design

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Date: 10.03.2003
Lang.: en
Dur.: 00:26:27

Reversible Logic Synthesis with Cascades of New Gate Families

M.H.A. Khan

Reversible Logic Synthesis with Cascades of New Gate Families

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Date: 10.03.2003
Lang.: en
Dur.: 00:21:52

Spectral Techniques for Reversible Logic Synthesis

G. Dueck

Spectral Techniques for Reversible Logic Synthesis

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Session 3

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Date: 10.03.2003
Lang.: en
Dur.: 00:30:50
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Date: 10.03.2003
Lang.: en
Dur.: 00:22:41

Minimizing AND-EXOR Expressions of Some Benchmark Functions

T. Hirayama

Minimizing AND-EXOR Expressions of Some Benchmark Functions

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Date: 10.03.2003
Lang.: en
Dur.: 00:29:56

Construction of Compact Word-Level Representations of Multiple-output Switching Functions by Wavelet Packets

R. S. Stankovic

Construction of Compact Word-Level Representations of Multiple-output Switching Functions by Wavelet Packets

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Date: 10.03.2003
Lang.: en
Dur.: 00:21:30

Fault Diagnosis for RAMS using WALSH Spectrum

Y. Iguchi

Fault Diagnosis for RAMS using WALSH Spectrum

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Session 5

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Date: 11.03.2003
Lang.: en
Dur.: 00:11:24

Totally Self-checking 1-out-of-n Checker with Applocation to Fault Tolerant Design

R. Krenz

Totally Self-checking 1-out-of-n Checker with Applocation to Fault Tolerant Design

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Date: 11.03.2003
Lang.: en
Dur.: 00:26:49

Well-Structured Graph-Driven Parity-FBBDs

M. Homeister

Well-Structured Graph-Driven Parity-FBBDs

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Date: 11.03.2003
Lang.: en
Dur.: 00:33:03

Variable Reordering von Parity-OBDDs

Dr. Harald Sack

Variable Reordering von Parity-OBDDs

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Session 6

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Date: 11.03.2003
Lang.: en
Dur.: 00:28:07

Multi-Output ESOP Synthesis with Cascades of New Reversible Gate Family

M.H.A. Khan

Multi-Output ESOP Synthesis with Cascades of New Reversible Gate Family

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Date: 11.03.2003
Lang.: en
Dur.: 00:23:46

Garbage in Reversible Designs of Multiple Output Functions

D. Maslov

Garbage in Reversible Designs of Multiple Output Functions

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Date: 11.03.2003
Lang.: en
Dur.: 00:19:21

Reversible Function Synthesis with Minimum Garbage Outputs

G. Dueck

Reversible Function Synthesis with Minimum Garbage Outputs

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Session 7/8

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Date: 11.03.2003
Lang.: en
Dur.: 00:32:32

Binary Decision Diagrams based on Single and Multiple Generalized Shannon Expansions

P. Kerntopf

Binary Decision Diagrams based on Single and Multiple Generalized Shannon Expansions

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Date: 11.03.2003
Lang.: en
Dur.: 00:17:16

Majority-Based Reversible Logic Gate

M. Lukac

Majority-Based Reversible Logic Gate

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Date: 11.03.2003
Lang.: en
Dur.: 00:17:16

A Hierarchical Approach to Computer Aided Design of Quantum Circuits

M. Lukac

A Hierarchical Approach to Computer Aided Design of Quantum Circuits

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