Hardware-Conscious Data Processing (ST 2022)

Prof. Dr. Tilmann Rabl


Hardware development continuously advances, with different technologies improving at different pace. While the amount of transistors in a CPU package are growing, the single core performance is stagnating due to physical limitations. These trends require changes in data processing to keep database management systems efficient. In this lecture, we will take a look at current computer architectures and accelerator technologies and how they can be used for efficient data processing. We will cover CPU and memory architecture; the storage hierarchy; modern memory technolgoies, such as NVM and NVMe; fast interconnects, such as Infiniband, RDMA, and NVLink; and accelerators, such as GPUs and FPGAs. The course has a significant practical part, where the students learn to implement data structures and algorithms tailored to hardware concious data processing.

Lectures

Introduction

Date: April 21, 2022
Language: English
Duration: 01:17:44

DBMS Recap

Date: April 21, 2022
Language: English
Duration: 01:16:14

Performance Management & Benchmarking

Date: April 26, 2022
Language: English
Duration: 01:32:31

CPU and Caching

Date: April 28, 2022
Language: English
Duration: 01:29:39

CPU - Instruction Execution

Date: May 3, 2022
Language: English
Duration: 01:26:28

CPU - Instruction Execution & SIMD

Date: May 5, 2022
Language: English
Duration: 01:25:59

SIMD & Task 1: SIMD Scan

Date: May 10, 2022
Language: English
Duration: 00:55:51

Multicore Parallelism

Date: May 17, 2022
Language: English
Duration: 01:27:50