Hardware-Conscious Data Processing (ST 2024)

Prof. Dr. Tilmann Rabl


Hardware development continuously advances, with different technologies improving at different paces. While the number of transistors in a CPU package grows, the single-core performance stagnates due to physical limitations. These trends require changes in data processing to keep database management systems efficient. In this lecture, we will take a look at current computer architectures and accelerator technologies and how they can be used for efficient data processing. We will cover CPU and memory architecture, the storage hierarchy, modern memory and storage technologies, such as NVMe, fast interconnects, such as Infiniband, NVLink, and CXL, and accelerators, such as GPUs and FPGAs. The course has a significant practical part, where the students learn to implement data structures and algorithms tailored to hardware-conscious data processing.

Lectures

Date: April 9, 2024
Language: English
Duration: 01:18:56
Date: April 17, 2024
Language: English
Duration: 01:15:54
Date: April 23, 2024
Language: English
Duration: 01:23:02
Date: April 24, 2024
Language: English
Duration: 01:29:06
Date: April 30, 2024
Language: English
Duration: 01:11:12
Date: May 7, 2024
Language: English
Duration: 00:46:11
Date: May 8, 2024
Language: English
Duration: 01:21:36
Date: May 14, 2024
Language: English
Duration: 01:07:50
Date: May 15, 2024
Language: English
Duration: 01:08:28
Date: May 21, 2024
Language: English
Duration: 01:32:26
Profiling 01:32:26
Date: May 22, 2024
Language: English
Duration: 01:23:35