Prof. Dr. Holger Karl

Chapter 1.4 (Queueing recap)


Date: 2021-11-22
Dur: 00:36:30

Chapter 1d (25-end)


Date: 2021-11-19
Dur: 00:27:07

Chapter 1d (19-24)


Date: 2021-11-18
Dur: 00:24:56

Register-Transfer-Ebene


Date: 2021-11-17
Dur: 01:29:01

Chapter 1d (11-18)


Date: 2021-11-17
Dur: 00:21:05

Chapter 1d (TCP CWND, 7-10)


Date: 2021-11-16
Dur: 00:41:17

Automaten & Register-Transfer-Ebene


Date: 2021-11-15
Dur: 01:29:48

Chapter 1d


Date: 2021-11-15
Dur: 00:25:44

Chapter 1d (1-4)


Date: 2021-11-12
Dur: 00:12:42

Chapter 1c (24-end)


Date: 2021-11-11
Dur: 00:43:49

Sequentielle Logik & Automaten


Date: 2021-11-10
Dur: 01:25:27

Chapter 1c (9-23)


Date: 2021-11-10
Dur: 00:37:51

Chapter 1c: Admission Control


Date: 2021-11-09
Dur: 00:30:46

Schaltnetze & Sequentielle Logik


Date: 2021-11-08
Dur: 01:33:12

Chapter 1c (1-8)


Date: 2021-11-08
Dur: 00:23:55

Chapter 1-b (66-90)


Date: 2021-11-05
Dur: 00:23:04

Chapter 1-b (60-65)


Date: 2021-11-04
Dur: 00:20:38

Schaltnetze


Date: 2021-11-03
Dur: 01:29:18